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dc.contributor.author | Molinar Solis, Jesús Ezequiel | |
dc.contributor.author | GARCIA LOZANO, RODOLFO ZOLA | |
dc.contributor.author | PONCE PONCE, VICTOR HUGO | |
dc.contributor.author | DIAZ SANCHEZ, ALEJANDRO | |
dc.contributor.author | ROCHA PEREZ, JOSE MIGUEL | |
dc.creator | Molinar Solis, Jesús Ezequiel; 38397 | |
dc.creator | GARCIA LOZANO, RODOLFO ZOLA; 91605 | |
dc.creator | PONCE PONCE, VICTOR HUGO; 35257 | |
dc.creator | DIAZ SANCHEZ, ALEJANDRO; 8120 | |
dc.creator | ROCHA PEREZ, JOSE MIGUEL; 59874 | |
dc.date.accessioned | 2016-03-16T17:17:00Z | |
dc.date.available | 2016-03-16T17:17:00Z | |
dc.date.issued | 2010 | |
dc.identifier | http://www.redalyc.org/articulo.oa?id=40415987007 | |
dc.identifier.uri | http://hdl.handle.net/20.500.11799/39158 | |
dc.description.abstract | This work provides an accurate methodology for extracting the floating-gate gain factory, of CMOS floating-gate inverters with a clock-driven switch for accessing temporarilly to the floating-gate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances coupled to the floating-gate can be easily extracted in a mismatch-free approach. This parameter plays an important role in modern analog and mixed-signal CMOS circuits, since it limits the circuit performance. Theoretical and measured values using two test cells, fabricated in a standard double poly double metal CMOS AMI-ABN process with 1.2 µm design rules, were compared. The extracted parameters can be incorporated into floating-gate PS pice macromodels for obtaining accurate electrical simulation. | es |
dc.format | application/pdf | |
dc.language.iso | eng | es |
dc.publisher | Universidad Nacional Autónoma de México | |
dc.relation | http://www.redalyc.org/revista.oa?id=404 | |
dc.rights | openAccess | |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0 | |
dc.source | Ingeniería. Investigación y Tecnología (México) Num.3 Vol.XI | |
dc.subject | Ingeniería | es |
dc.subject | FG-inverter | es |
dc.subject | neuMOS | es |
dc.subject | floating-gate | es |
dc.subject.classification | INGENIERÍA Y TECNOLOGÍA | |
dc.title | Electrical parameters extraction of CMOS floating-gate inverters | es |
dc.type | Artículo | |
dc.provenance | Científica | |
dc.road | Dorada | |
dc.ambito | Internacional | es |
dc.audience | students | |
dc.audience | researchers | |
dc.type.conacyt | article | |
dc.identificator | 7 |
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